Keynote Topic: Hardware Security 2.0: The Evolving Role of Generative AI

Abstract: With the growing adoption of IoT applications, hardware security has become a critical concern. Emerging attacks on microchips and vulnerabilities in the microelectronics supply chain highlight the need for secure and trustworthy hardware. This talk explores hardware security challenges, design and verification solutions, and the emerging role of AI-driven assurance. It also highlights how generative AI can transform hardware security design and verification, enabling more secure and trustworthy IoT systems.

Biography

Dr. Swarup Bhunia is Director of the Nanoscape Research Lab. He is an IEEE Fellow and the Director of the Warren B. Nelms Institute for the Connected World. He is the University of Florida Distinguished Professor and holds the titles of Preeminence Professor and Semmoto Endowed Chair Professor of Internet of Things in the Department of Electrical and Computer Engineering at the University of Florida, Gainesville, FL, USA. He received his B.E. (Hons.) from Jadavpur University, Kolkata, India, the M.Tech. degree from the Indian Institute of Technology (IIT), Kharagpur, and his Ph.D. from Purdue University in 2005. Previously, Dr. Bhunia served as the T. and A. Schroeder Associate Professor at Case Western Reserve University and worked in the semiconductor industry on RTL synthesis, verification, and low-power design. He has over 20 years of research and development experience, with over 250 peer-reviewed publications in journals and conferences, more than 10 authored or edited books, and multiple patents. His research focuses on hardware security and trust (including system-on-chip and IoT security), intelligent edge computing, Internet of Things (IoT) technology and applications, low-power and robust design, adaptive nanocomputing, and spectroscopic authentication for food and medicine safety.

Dr. Bhunia’s recognitions include UF Research Foundation Professor (2024), IEEE Fellow (2023), IEEE Hardware Oriented Security and Test (HOST) Hall of Fame (2023), UF Innovator of the Year (2022), HWCOE Doctoral Dissertation Mentoring Award (2022), UF ECE Staff Choice Award for Faculty (2022), IEEE-CS TCVLSI Distinguished Research Award (2018), ECE Research Excellence Award (2018), Research Promotion Initiative Award (2018), Herbert Wertheim Faculty Award for Excellence in Innovation (2018), IBM Faculty Award (2013), NSF CAREER Award (2011), Mike Mesarovic Award for Extraordinary Impact (2011), SRC Technical Excellence Award (2005, team), and SRC Inventor Recognition Award (2009).

Dr. Bhunia has been serving as founding editor-in-chief in Journal of Hardware and Systems Security (HaSS), an associate editor of IEEE Transactions on CAD (TCAD), IEEE Transactions on Multi-Scale Computing Systems (TMSCS), ACM Journal of Emerging Technologies (JETC), and Journal of Low Power Electronics (JOLPE). He has served as a guest editor of IEEE Design & Test of Computers (2010, 2013), IEEE Computer Magazine (2016), IEEE Transacation on CAD (2015), and IEEE Journal on Emerging and Selected Topics in Circuits and Systems (2014). He has served as co-general chair of the Warren B. Nelms Annual IoT Conference (2024), co-program chair of IEEE IMS3TW 2011, IEEE NANOARCH 2013, IEEE VDAT 2014, and IEEE HOST 2015, and in the technical program committee of Design Automation Conference (2014-2015), Design Automation and Test in Europe (DATE 2006-2010), Hardware Oriented Trust and Security Symposium (HOST 2008-2010), IEEE/IFIP International Conference on VLSI (VLSI SOC 2008), Test Technology Educational Program (TTEP 2006-2008), International Symposium on Low Power Electronics and Design (ISLPED 2007-2008), IEEE/ACM Symposium on Nanoscale Architectures (NANOARCH 2007-2010), IEEE International Conference on VLSI (ISVLSI 2008-2010), International Conference of VLSI Design as a track chair (2010) and in the program committee of International Online Test Symposium (IOLTS 2005). Dr. Bhunia has given tutorials on low-power and robust design and test in premier conference including International Test Conferences (ITC 2009), VLSI Test Symposium (VTS 2010), and Design Automation and Test in Europe (DATE 2009). He is also a distinguished ACM speaker.